Computer organisation · study figure

The single-cycle MIPS processor, as a circuit board

Every instruction runs from one clock edge to the next. Watch the values ripple from the PC through the board, see which wires the instruction really uses, and which 1-bit control lines (amber) steer it there.

Instruction [25–0]Instruction [31–26][25–21][20–16][15–11]Instruction [15–0][5–0]PC+4 [31–28]Jump address [31–0]Next PCRegDstJumpBranchMemReadMemtoRegALUOpMemWriteALUSrcRegWriteALU operationZeroresult26281632MUXMUXMUXMUXMUXMIPS-1 · SINGLE CYCLESTEPCLK 25MHzPWRJ1 · DEBUG«24ADD0101ADD«2&CONTROLPC INSTRUCTION MEMORY 01REGISTERS ALU 0101DATA MEMORY SIGN EXTALU CTRL
32-bit data bus: wide traceInstruction field (4–28 bits): medium trace1-bit control / flag: amber, LED lit = 1Don't-care (X) or unused this cycle: fadedMoving dashes: value this instruction usesLayout follows Patterson & Hennessy's datapath with Jump (JAL, JR, JALR omitted). The clock period must fit the slowest instruction, lw: PC → instruction memory → registers → ALU → data memory → MemtoReg mux → register file. Every other instruction waits for it — the price of a single cycle.

Instruction

Run one on its own:
means

Hover a field to light the board traces its bits travel on. The fields are split off by wiring alone, no logic.

Program click a line to jump there

  1. 004000008E090000lw $t1, 0($s0)
  2. 004000048E0A0004lw $t2, 4($s0)
  3. 00400008012A5820add $t3, $t1, $t2
  4. 0040000CAE0B0008sw $t3, 8($s0)
  5. 0040001001696022sub $t4, $t3, $t1
  6. 00400014118A0001beq $t4, $t2, 1
  7. 00400018012A6824and $t5, $t1, $t2
  8. 0040001C0149682Aslt $t5, $t2, $t1
  9. 0040002011A0FFF7beq $t5, $zero, -9
  10. 00400024012A7025or $t6, $t1, $t2
  11. 0040002821EF0001addi $t7, $t7, 1
  12. 0040002C08100000j 0x00400000

Control signals

RegDst
Jump
Branch
MemRead
MemtoReg
ALUOp
MemWrite
ALUSrc
RegWrite

Inspector

State changes at the clock edge